OMAP2+ IOMMU

Required properties:
- compatible : Should be one of,
		"ti,omap2-iommu" for OMAP2/OMAP3 IOMMU instances
		"ti,omap4-iommu" for OMAP4/OMAP5 IOMMU instances
		"ti,dra7-iommu" for DRA7xx IOMMU instances
- ti,hwmods  : Name of the hwmod associated with the IOMMU instance
- reg        : Address space for the configuration registers for all
               MMUs. This should also contain a DSP_SYSTEM register
               space for DSP IOMMU instances on DRA7xx SoCs
- interrupts : Interrupt specifier for the IOMMU instance

Optional properties:
- ti,#tlb-entries : Number of entries in the translation look-aside buffer.
                    Should be either 8 or 32 (default: 32)
- ti,iommu-bus-err-back : Indicates the IOMMU instance supports throwing
		          back a bus error response on MMU faults.
- reg-names : Names for the address spaces as specified in 'reg' property.
              Should contain only the following strings,
		"mmu_cfg" and/or "dsp_system"
              This property is mandatory for DSP IOMMU instances on DRA7xx
              SoCs, and is optional on other SoCs.

Example:
	/* OMAP3 ISP MMU */
	mmu_isp: mmu@480bd400 {
		compatible = "ti,omap2-iommu";
		reg = <0x480bd400 0x80>;
		interrupts = <24>;
		ti,hwmods = "mmu_isp";
		ti,#tlb-entries = <8>;
	};

	/* DRA74x DSP2 MMUs */
	mmu0_dsp2: mmu@41501000 {
		compatible = "ti,dra7-iommu";
		reg = <0x41501000 0x100>, <0x41500000 0x100>;
		reg-names = "mmu_cfg", "dsp_system";
		interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
		ti,hwmods = "mmu0_dsp2";
	};

	mmu1_dsp2: mmu@41502000 {
		compatible = "ti,dra7-iommu";
		reg = <0x41502000 0x100>, <0x41500000 0x100>;
		reg-names = "mmu_cfg", "dsp_system";
		interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
		ti,hwmods = "mmu1_dsp2";
	};
