Qualcomm Technologies, Inc. WCD audio CODEC

Required properties:

 - compatible : "qcom,pahu-slim-pgd" or "qcom,pahu-i2c" for pahu Codec
                "qcom,tavil-slim-pgd" or "qcom,tavil-i2c-pgd" for Tavil codec
		"qcom,tasha-slim-pgd" or "qcom,tasha-i2c-pgd" for Tasha Codec
 - elemental-addr: codec slimbus slave PGD enumeration address.(48 bits)

 - qcom,cdc-reset-gpio: gpio used for codec SOC reset.
                        If this property is not defined, it is expected
                        to atleast have "qcom,wcd-rst-n-gpio" to be defined.
 - qcom,wcd-rst-gpio-node: Phandle reference to the DT node having codec reset gpio
                        configuration. If this property is not defined, it is
                        expected to atleast define "qcom,cdc-reset-gpio" property.
 - cdc-vdd-buck-supply: phandle of buck supply's regulator device tree node.
 - qcom,cdc-vdd-buck-voltage: buck supply's voltage level min and max in mV.
 - qcom,cdc-vdd-buck-current: buck supply's max current in mA.

 - cdc-vdd-tx-h-supply: phandle of tx-h supply's regulator device tree node.
 - qcom,cdc-vdd-tx-h-voltage: tx-h supply's voltage level min and max in mV.
 - qcom,cdc-vdd-tx-h-current: tx-h supply's max current in mA.

 - cdc-vdd-rx-h-supply: phandle of rx-h supply's regulator device tree node.
 - qcom,cdc-vdd-rx-h-voltage: rx-h supply's voltage level min and max in mV.
 - qcom,cdc-vdd-rx-h-current: rx-h supply's max current in mA.

 - cdc-vddpx-1-supply: phandle of px-1 supply's regulator device tree node.
 - qcom,cdc-vddpx-1-voltage: px-1 supply's voltage level min and max in mV.
 - qcom,cdc-vddpx-1-current: px-1 supply's max current in mA.

 - cdc-vdd-a-1p2v-supply: phandle of 1.2v supply's regulator device tree node.
 - qcom,cdc-vdd-a-1p2v-voltage: 1.2v supply's voltage level min and max in mV.
 - qcom,cdc-vdd-a-1p2v-current: 1.2v supply's max current in mA.

 - cdc-vddcx-1-supply: phandle of cx-1 supply's regulator device tree node.
 - qcom,cdc-vddcx-1-voltage: cx-1 supply's voltage level min and max in mV.
 - qcom,cdc-vddcx-1-current: cx-1 supply's max current in mA.

 - cdc-vddcx-2-supply: phandle of cx-2 supply's regulator device tree node.
 - qcom,cdc-vddcx-2-voltage: cx-2 supply's voltage level min and max in mV.
 - qcom,cdc-vddcx-2-current: cx-2 supply's max current in mA.

 - cdc-vdd-buckhelper-supply: phandle of helper regulator supply's
				device tree node. This supply is a helper regulator for
				cdc-vdd-buck-supply regulator.
 - cdc-vdd-buckhelper-voltage: helper supply's voltage level min and max in mV.
 - qcom,cdc-vdd-buckhelper-current: helper supply's max current in mA.

 - qcom,cdc-static-supplies: List of supplies to be enabled prior to codec
			     hardware probe.  Supplies in this list will be
			     stay enabled.

 - qcom,cdc-micbias-ldoh-v - LDOH output in volts (should be 1.95 V and 3.00 V).

 - qcom,cdc-micbias-cfilt1-mv - cfilt1 output voltage in milli volts.
 - qcom,cdc-micbias-cfilt2-mv - cfilt2 output voltage in milli volts.
 - qcom,cdc-micbias-cfilt3-mv - cfilt3 output voltage in milli volts.
   cfilt voltage can be set to max of qcom,cdc-micbias-ldoh-v - 0.15V.

 - qcom,cdc-micbias1-cfilt-sel = cfilt to use for micbias1
				 (should be from 1 to 3).
 - qcom,cdc-micbias2-cfilt-sel = cfilt to use for micbias2
				 (should be from 1 to 3).
 - qcom,cdc-micbias3-cfilt-sel = cfilt to use for micbias3
				 (should be from 1 to 3).
 - qcom,cdc-micbias4-cfilt-sel = cfilt to use for micbias4
				 (should be from 1 to 3).
   This value represents the connected CFLIT to MIC Bias.

 - qcom,cdc-micbias1-ext-cap: Boolean. Enable micbias 1 external capacitor mode.
 - qcom,cdc-micbias2-ext-cap: Boolean. Enable micbias 2 external capacitor mode.
 - qcom,cdc-micbias3-ext-cap: Boolean. Enable micbias 3 external capacitor mode.
 - qcom,cdc-micbias4-ext-cap: Boolean. Enable micbias 4 external capacitor mode.
 - qcom,cdc-mclk-clk-rate - Specifies the master clock rate in Hz required for
			    codec.
 - qcom,cdc-slim-ifd-dev - namme of the codec slim interface device.
 - qcom,cdc-slim-ifd-elemental-addr - codec slimbus slave interface device
				     enumeration address.

Optional properties:
 - qcom,cdc-ext-clk-rate - Specifies the clock rate of external crystal which
			   is sourced to codec mclk in HZ. This should be either
			   same as qcom,cdc-mclk-clk-rate or its double.
 - cdc-dmic-sample-rate: Specifies the sample rate of digital mic in HZ. The
			 values for 9.6MHZ mclk can be 2400000 Hz, 3200000 Hz
			 and 4800000 Hz.  The values for 12.288MHz mclk can be
			 3072200 Hz, 4096000 Hz and 6144000 Hz.

 - qcom,cdc-mad-dmic-rate: Specifies the sample rate of digital mic in HZ to be
			   used by MAD (Microphone Activity Detection) hardware
			   block on the codec. The valid set of values are same
			   as that of cdc-dmic-sample-rate, but this rate will
			   only be used by MAD and all other audio use cases
			   involving DMIC will use the rate defined by
			   cdc-dmic-sample-rate.

 - qcom,cdc-ecpp-dmic-rate: Specifies the sample rate of digital mic in HZ to be
			    used by ECPP (Echo Cancellation Ping Pong) block
			    on the codec. The valid set of values are same
			    as that of cdc-dmic-sample-rate, but this rate will
			    only be used by ECPP and all other audio use cases
			    involving DMIC will use the rate defined by
			    cdc-dmic-sample-rate.

 - qcom,cdc-dmic-clk-drv-strength: Specifies the drive strength for digital microphone
				   clock in the codec. Accepted values are 2,4,8 and 16.
				   The clock drive strentgh is in uA. Codec driver will
				   choose default value for particular codec if this
				   value is not specified in device tree.

 - qcom,cdc-on-demand-supplies: List of supplies which can be enabled
				dynamically.
				Supplies in this list are off by default.

- qcom,cdc-cp-supplies: List of supplies required for codec chargepump enable
				Supplies in this list can be enabled/disabled dynamically and
				are off by default.

 - qcom,cdc-micbias2-headset-only: Boolean. Allow micbias 2 only to headset mic.

 - qcom,cdc-variant: Indicates codec variant, WCD9XXX indicates all codecs till Taiko
			WCD9330 indicates wcd9330 audio codec

 - qcom,cdc-micbias1-mv: micbias1 output voltage in milli volts.
			 This is used when cfilt is not user configurable
			 and micbias1 is directly controlled with a register
			 write.

 - qcom,cdc-micbias2-mv: micbias2 output voltage in milli volts.
			 This is used when cfilt is not user configurable
			 and micbias2 is directly controlled with a register
			 write.

 - qcom,cdc-micbias3-mv: micbias3 output voltage in milli volts.
			 This is used when cfilt is not user configurable
			 and micbias3 is directly controlled with a register
			 write.

 - qcom,cdc-micbias4-mv: micbias4 output voltage in milli volts.
			 This is used when cfilt is not user configurable
			 and micbias4 is directly controlled with a register
			 write.

 - clock-names : clock name defined for external clock.
 - clocks : external clock defined for codec clock.

 - qcom,has-buck-vsel-gpio:  Boolean property to select if WCD_BUCK has VSEL
			controlled by GPIO.
 - qcom,buck-vsel-gpio-node: Phandle reference to the DT node having wcd buck
			VSEL gpio configuration.

 - cdc-vdd-ldo-rxtx-supply: phandle of ldo-rxtx supply's regulator device tree node.
 - qcom,cdc-vdd-ldo-rxtx-voltage: ldo-rxtx supply's voltage level min and max in mV.
 - qcom,cdc-vdd-ldo-rxtx-current: ldo-rxtx supply's max current in mA.

 - cdc-vdd-buck-sido-supply: phandle of vdd buck sido supply's regulator device tree node.
 - qcom,cdc-vdd-buck-sido-voltage: vdd buck sido supply's voltage level min and max in mV.
 - qcom,cdc-vdd-buck-sido-current: lvdd buck sido supply's max current in mA.
 - qcom,vreg-micb-supply: phandle to change micbias load depending on usecase.
Example:

pahu_codec {
	compatible = "qcom,pahu-slim-pgd";
	elemental-addr = [00 01 C0 02 17 02];

	qcom,cdc-reset-gpio = <&msmgpio 63 0>;
	interrupt-parent = <&wcd9xxx_intc>;
	interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
		      17 18 19 20 21 22 23 24 25 26 27 28 29
		      30 31>;
	qcom,wcd-rst-gpio-node = <&wcd_rst_gpio>;

	clock-names = "wcd_clk";
	clocks = <&clock_audio AUDIO_LPASS_MCLK>;

	cdc-vdd-ldo-rxtx-supply = <&pm8150_s5>;
	qcom,cdc-vdd-ldo-rxtx-voltage = <2040000 2040000>;
	qcom,cdc-vdd-ldo-rxtx-current = <30000>;

	cdc-vdd-buck-sido-supply = <&pm8150_s4>;
	qcom,cdc-vdd-buck-sido-voltage = <1800000 1800000>;
	qcom,cdc-vdd-buck-sido-current = <250000>;

	cdc-vdd-px-supply = <&pm8150_s4>;
	qcom,cdc-vdd-px-voltage = <1800000 1800000>;
	qcom,cdc-vdd-px-current = <15000>;

	cdc-vdd-mic-bias-supply = <&pm8150l_bob>;
	qcom,cdc-vdd-mic-bias-voltage = <3300000 3300000>;
	qcom,cdc-vdd-mic-bias-current = <20000>;

	cdc-vdd-pa-supply = <&pm8150l_bob>;
	qcom,cdc-vdd-pa-voltage = <3300000 3300000>;
	qcom,cdc-vdd-pa-current = <230000>;

	qcom,cdc-static-supplies = "cdc-vdd-buck-sido",
				   "cdc-vdd-px",
				   "cdc-vdd-mic-bias",
				   "cdc-vdd-pa";
	qcom,cdc-on-demand-supplies = "cdc-vdd-ldo-rxtx";

	qcom,cdc-micbias1-mv = <1800>;
	qcom,cdc-micbias2-mv = <1800>;
	qcom,cdc-micbias3-mv = <1800>;
	qcom,cdc-micbias4-mv = <1800>;
	qcom,cdc-micbias-ldoh-v = <0x3>;
	qcom,cdc-micbias-cfilt1-mv = <1800>;
	qcom,cdc-micbias-cfilt2-mv = <2700>;
	qcom,cdc-micbias-cfilt3-mv = <1800>;
	qcom,cdc-micbias1-cfilt-sel = <0x0>;
	qcom,cdc-micbias2-cfilt-sel = <0x1>;
	qcom,cdc-micbias3-cfilt-sel = <0x2>;
	qcom,cdc-micbias4-cfilt-sel = <0x2>;
	qcom,cdc-micbias1-ext-cap;
	qcom,cdc-micbias2-ext-cap;
	qcom,cdc-micbias3-ext-cap;
	qcom,cdc-micbias4-ext-cap;
	qcom,cdc-mclk-clk-rate = <9600000>;
	qcom,cdc-micbias2-headset-only;

	qcom,cdc-mclk-clk-rate = <9600000>;
	qcom,cdc-slim-ifd = "pahu-slim-ifd";
	qcom,cdc-slim-ifd-elemental-addr = [00 00 C0 02 17 02];
	qcom,cdc-dmic-sample-rate = <4800000>;
	qcom,cdc-mad-dmic-rate = <600000>;

	qcom,vreg-micb-supply = <&BOB>;

	qcom,wdsp-cmpnt-dev-name = "pahu_codec";

	wcd_spi_0: wcd_spi {
		compatible = "qcom,wcd-spi-v2";
		qcom,master-bus-num = <0>;
		qcom,chip-select = <0>;
		qcom,max-frequency = <24000000>;
		qcom,mem-base-addr = <0x100000>;
	};
};

Wcd9xxx audio CODEC in I2C mode

 - compatible = "qcom,wcd9xxx-i2c-device";
 - reg: represents the slave address provided to the I2C driver.
 - qcom,cdc-reset-gpio: gpio used for codec SOC reset.

 - cdc-vdd-buck-supply: phandle of buck supply's regulator device tree node.
 - qcom,cdc-vdd-buck-voltage: buck supply's voltage level min and max in mV.
 - qcom,cdc-vdd-buck-current: buck supply's max current in mA.

 - cdc-vdd-tx-h-supply: phandle of tx-h supply's regulator device tree node.
 - qcom,cdc-vdd-tx-h-voltage: tx-h supply's voltage level min and max in mV.
 - qcom,cdc-vdd-tx-h-current: tx-h supply's max current in mA.

 - cdc-vdd-rx-h-supply: phandle of rx-h supply's regulator device tree node.
 - qcom,cdc-vdd-rx-h-voltage: rx-h supply's voltage level min and max in mV.
 - qcom,cdc-vdd-rx-h-current: rx-h supply's max current in mA.

 - cdc-vddpx-1-supply: phandle of px-1 supply's regulator device tree node.
 - qcom,cdc-vddpx-1-voltage: px-1 supply's voltage level min and max in mV.
 - qcom,cdc-vddpx-1-current: px-1 supply's max current in mA.

 - cdc-vdd-a-1p2v-supply: phandle of 1.2v supply's regulator device tree node.
 - qcom,cdc-vdd-a-1p2v-voltage: 1.2v supply's voltage level min and max in mV.
 - qcom,cdc-vdd-a-1p2v-current: 1.2v supply's max current in mA.

 - cdc-vddcx-1-supply: phandle of cx-1 supply's regulator device tree node.
 - qcom,cdc-vddcx-1-voltage: cx-1 supply's voltage level min and max in mV.
 - qcom,cdc-vddcx-1-current: cx-1 supply's max current in mA.

 - cdc-vddcx-2-supply: phandle of cx-2 supply's regulator device tree node.
 - qcom,cdc-vddcx-2-voltage: cx-2 supply's voltage level min and max in mV.
 - qcom,cdc-vddcx-2-current: cx-2 supply's max current in mA.

 - qcom,cdc-static-supplies: List of supplies to be enabled prior to codec
			     hardware probe.  Supplies in this list will be
			     stay enabled.

 - qcom,cdc-micbias-ldoh-v - LDOH output in volts (should be 1.95 V and 3.00 V).

 - qcom,cdc-micbias-cfilt1-mv - cfilt1 output voltage in milli volts.
 - qcom,cdc-micbias-cfilt2-mv - cfilt2 output voltage in milli volts.
 - qcom,cdc-micbias-cfilt3-mv - cfilt3 output voltage in milli volts.
   cfilt voltage can be set to max of qcom,cdc-micbias-ldoh-v - 0.15V.

 - qcom,cdc-micbias1-cfilt-sel = cfilt to use for micbias1
				 (should be from 1 to 3).
 - qcom,cdc-micbias2-cfilt-sel = cfilt to use for micbias2
				 (should be from 1 to 3).
 - qcom,cdc-micbias3-cfilt-sel = cfilt to use for micbias3
				 (should be from 1 to 3).
 - qcom,cdc-micbias4-cfilt-sel = cfilt to use for micbias4
				 (should be from 1 to 3).
   This value represents the connected CFLIT to MIC Bias.

 - qcom,cdc-micbias1-ext-cap: Boolean. Enable micbias 1 external capacitor mode.
 - qcom,cdc-micbias2-ext-cap: Boolean. Enable micbias 2 external capacitor mode.
 - qcom,cdc-micbias3-ext-cap: Boolean. Enable micbias 3 external capacitor mode.
 - qcom,cdc-micbias4-ext-cap: Boolean. Enable micbias 4 external capacitor mode.
 - qcom,cdc-mclk-clk-rate - Specifies the master clock rate in Hz required for
			    codec.

Optional properties:

 - cdc-vdd-spkdrv-supply: phandle of spkdrv supply's regulator device tree node.
 - qcom,cdc-vdd-spkdrv-voltage: spkdrv supply voltage level min and max in mV.
 - qcom,cdc-vdd-spkdrv-current: spkdrv supply max current in mA.

 - cdc-vdd-spkdrv-supply: phandle of spkdrv supply's regulator device tree node.
 - qcom,cdc-vdd-spkdrv-voltage: spkdrv supply voltage level min and max in mV.
 - qcom,cdc-vdd-spkdrv-current: spkdrv supply max current in mA.

 - cdc-vdd-spkdrv-2-supply: phandle of spkdrv2 supply's regulator device tree node.
 - qcom,cdc-vdd-spkdrv-2-voltage: spkdrv2 supply voltage level min and max in mV.
 - qcom,cdc-vdd-spkdrv-2-current: spkdrv2 supply max current in mA.

 - qcom,cdc-on-demand-supplies: List of supplies which can be enabled
				dynamically.
				Supplies in this list are off by default.

Example:
i2c@f9925000 {
	cell-index = <3>;
	compatible = "qcom,i2c-qup";
	reg = <0xf9925000 0x1000>;
	#address-cells = <1>;
	#size-cells = <0>;
	reg-names = "qup_phys_addr";
	interrupts = <0 97 0>;
	interrupt-names = "qup_err_intr";
	qcom,i2c-bus-freq = <100000>;
	qcom,i2c-src-freq = <24000000>;

	wcd9xxx_codec@0d{
		compatible = "qcom,wcd9xxx-i2c";
		reg = <0x0d>;
		qcom,cdc-reset-gpio = <&msmgpio 22 0>;
		interrupt-parent = <&wcd9xxx_intc>;
		interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
			      20 21 22 23 24 25 26 27 28>;

		cdc-vdd-buck-supply = <&pm8019_l11>;
		qcom,cdc-vdd-buck-voltage = <1800000 1800000>;
		qcom,cdc-vdd-buck-current = <25000>;

		cdc-vdd-tx-h-supply = <&pm8019_l11>;
		qcom,cdc-vdd-tx-h-voltage = <1800000 1800000>;
		qcom,cdc-vdd-tx-h-current = <25000>;

		cdc-vdd-rx-h-supply = <&pm8019_l11>;
		qcom,cdc-vdd-rx-h-voltage = <1800000 1800000>;
		qcom,cdc-vdd-rx-h-current = <25000>;

		cdc-vddpx-1-supply = <&pm8019_l11>;
		qcom,cdc-vddpx-1-voltage = <1800000 1800000>;
		qcom,cdc-vddpx-1-current = <10000>;

		cdc-vdd-a-1p2v-supply = <&pm8019_l9>;
		qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
		qcom,cdc-vdd-a-1p2v-current = <10000>;

		cdc-vddcx-1-supply = <&pm8019_l9>;
		qcom,cdc-vddcx-1-voltage = <1200000 1200000>;
		qcom,cdc-vddcx-1-current = <10000>;

		cdc-vddcx-2-supply = <&pm8019_l9>;
		qcom,cdc-vddcx-2-voltage = <1200000 1200000>;
		qcom,cdc-vddcx-2-current = <10000>;

		qcom,cdc-static-supplies = "cdc-vdd-buck",
					   "cdc-vdd-tx-h",
					   "cdc-vdd-rx-h",
					   "cdc-vddpx-1",
					   "cdc-vdd-a-1p2v",
					   "cdc-vddcx-1",
					   "cdc-vddcx-2";

		cdc-vdd-spkdrv-supply = <&pmi8994_boost>;
		qcom,cdc-vdd-spkdrv-voltage = <5000000 5000000>;
		qcom,cdc-vdd-spkdrv-current = <600000>;

		cdc-vdd-spkdrv-2-supply = <&pmi8994_boost>;
		qcom,cdc-vdd-spkdrv-2-voltage = <5000000 5000000>;
		qcom,cdc-vdd-spkdrv-2-current = <600000>;

		qcom,cdc-on-demand-supplies = "cdc-vdd-spkdrv",
					      "cdc-vdd-spkdrv-2";

		qcom,cdc-micbias-ldoh-v = <0x3>;
		qcom,cdc-micbias-cfilt1-mv = <1800>;
		qcom,cdc-micbias-cfilt2-mv = <2700>;
		qcom,cdc-micbias-cfilt3-mv = <1800>;
		qcom,cdc-micbias1-cfilt-sel = <0x0>;
		qcom,cdc-micbias2-cfilt-sel = <0x1>;
		qcom,cdc-micbias3-cfilt-sel = <0x2>;
		qcom,cdc-micbias4-cfilt-sel = <0x2>;
		qcom,cdc-mclk-clk-rate = <12288000>;
	};

	wcd9xxx_codec@77{
		compatible = "qcom,wcd9xxx-i2c";
		reg = <0x77>;
	};

	wcd9xxx_codec@66{
		compatible = "qcom,wcd9xxx-i2c";
		reg = <0x66>;
	};
	wcd9xxx_codec@55{
		compatible = "qcom,wcd9xxx-i2c";
		reg = <0x55>;
	};
};

MSM based Soundwire audio codec

Required properties:
 - compatible = "qcom,msm-sdw-codec";
 - reg: Specifies the soundwire codec base address for MSM digital
	soundwire core registers.
 - interrupts: Specifies the soundwire master interrupt number to Apps processor.
 - interrupt-names: Specify the interrupt name from soundwire master.
 - swr_master: This node is added as a child of MSM soundwire codec
	       and uses already existing driver soundwire master.
	       And there is/are subchild node(s) under soundwire master
	       which is also existing driver WSA881x that represents
	       soundwire slave devices.

Example:

msm_sdw_codec: qcom,msm-sdw-codec@152c1000 {
	compatible = "qcom,msm-sdw-codec";
	reg = <0x152c1000 0x0>;
	interrupts = <0 161 0>;
	interrupt-names = "swr_master_irq";

	swr_master {
		compatible = "qcom,swr-wcd";
		#address-cells = <2>;
		#size-cells = <0>;

		wsa881x_1: wsa881x@20170212 {
			compatible = "qcom,wsa881x";
			reg = <0x00 0x20170212>;
			qcom,spkr-sd-n-gpio = <&tlmm 80 0>;
		};
	};
};

WSA macro in Bolero codec

Required properties:
 - compatible = "qcom,wsa-macro";
 - reg: Specifies the WSA macro base address for Bolero
	soundwire core registers.
 - clock-names : clock names defined for WSA macro
 - clocks : clock handles defined for WSA  macro
 - qcom,default-clk-id: Default clk ID used for WSA macro
 - qcom,wsa-swr-gpios: phandle for SWR data and clock GPIOs of WSA macro
 - qcom,wsa-bcl-pmic-params: u8 array of PMIC ID, SID and PPID in same order
			 required to be configured to receive interrupts
			 in BCL block of WSA macro

WSA slave device as child of Bolero codec

Required properties:
 - compatible = "qcom,wsa881x";
 - reg: Specifies the WSA slave device base address.
 - qcom,spkr-sd-n-gpio: speaker reset gpio

Optional properties:
 - qcom,bolero-handle: phandle to bolero codec

Example:

&bolero {
	wsa_macro: wsa-macro {
		compatible = "qcom,wsa-macro";
		reg = <0x0C2C0000 0x0>;
		clock-names = "wsa_core_clk", "wsa_npl_clk";
		clocks = <&clock_audio_wsa_1 0>,
		<&clock_audio_wsa_2 0>;
		qcom,wsa-swr-gpios = &wsa_swr_gpios;
		qcom,wsa-bcl-pmic-params = /bits/ 8 <0x00 0x00 0x1E>;
		qcom,default-clk-id = <TX_CORE_CLK>;
		swr_0: wsa_swr_master {
			compatible = "qcom,swr-mstr";
			wsa881x_1: wsa881x@20170212 {
				compatible = "qcom,wsa881x";
				reg = <0x00 0x20170212>;
				qcom,spkr-sd-n-gpio = <&tlmm 80 0>;
				qcom,bolero-handle = <&bolero>;
			};
		};
	};
};

VA macro in bolero codec

Required properties:
 - compatible = "qcom,va-macro";
 - reg: Specifies the VA macro base address for Bolero
	soundwire core registers.
 - clock-names : clock names defined for VA macro
 - clocks : clock handles defined for VA macro
 - qcom,default-clk-id: Default clk ID used for VA macro
 - va-vdd-micb-supply: phandle of mic bias supply's regulator device tree node
 - qcom,va-vdd-micb-voltage: mic bias supply's voltage level min and max in mV
 - qcom,va-vdd-micb-current: mic bias supply's max current in mA
 - qcom,va-dmic-sample-rate: Sample rate defined for DMIC connected to VA macro

Optional properties:
 - qcom,va-clk-mux-select: VA macro MCLK MUX selection
 - qcom,va-island-mode-muxsel: VA macro island mode MUX selection
		This property is required if qcom,va-clk-mux-select is provided

Example:

&bolero {
	va_macro: va-macro {
		compatible = "qcom,va-macro";
		reg = <0x0C490000 0x0>;
		clock-names = "va_core_clk";
		clocks = <&clock_audio_va 0>;
		qcom,default-clk-id = <TX_CORE_CLK>;
		va-vdd-micb-supply = <&S4A>;
		qcom,va-vdd-micb-voltage = <1800000 1800000>;
		qcom,va-vdd-micb-current = <11200>;
		qcom,va-dmic-sample-rate = <4800000>;
		qcom,va-clk-mux-select = <1>;
		qcom,va-island-mode-muxsel = <0x033A0000>;
	};
};

RX macro in bolero codec

Required properties:
 - compatible = "qcom,rx-macro";
 - reg: Specifies the Rx macro base address for Bolero
	soundwire core registers.
 - clock-names : clock names defined for RX macro
 - clocks : clock handles defined for RX macro
 - qcom,default-clk-id: Default clk ID used for RX macro
 - qcom,rx-swr-gpios: phandle for SWR data and clock GPIOs of RX macro
 - qcom,rx_mclk_mode_muxsel: register address for RX macro MCLK mode mux select
 - qcom,rx-bcl-pmic-params: u8 array of PMIC ID, SID and PPID in same order
			 required to be configured to receive interrupts
			 in BCL block of WSA macro

Example:

&bolero {
	rx_macro: rx-macro {
		compatible = "qcom,rx-macro";
		reg = <0x62EE0000 0x0>;
		clock-names = "rx_core_clk", "rx_npl_clk";
		clocks = <&clock_audio_rx_1 0>,
			 <&clock_audio_rx_2 0>;
		qcom,rx-swr-gpios = <&rx_swr_gpios>;
		qcom,rx_mclk_mode_muxsel = <0x62C25020>;
		qcom,rx-bcl-pmic-params = /bits/ 8 <0x00 0x00 0x1E>;
		qcom,default-clk-id = <TX_CORE_CLK>;
		swr_1: rx_swr_master {
			compatible = "qcom,swr-mstr";
			wcd937x_rx_slave: wcd937x-rx-slave {
				compatible = "qcom,wcd937x-slave";
			};
			wcd938x_rx_slave: wcd938x-rx-slave {
				compatible = "qcom,wcd938x-slave";
			};
		};
	};
};

TX macro in bolero codec

Required properties:
 - compatible = "qcom,tx-macro";
 - reg: Specifies the Tx macro base address for Bolero
	soundwire core registers.
 - clock-names : clock names defined for TX macro
 - clocks : clock handles defined for TX macro
 - qcom,tx-swr-gpios: phandle for SWR data and clock GPIOs of TX macro
 - qcom,tx-dmic-sample-rate: Sample rate defined for DMICs connected to TX macro

Optional Properties:
 - qcom,swr-wakeup-irq: Specifies whether the interrupt line is on GPIO
			or GQIC

Example:

&bolero {
	tx_macro: tx-macro {
		compatible = "qcom,tx-macro";
		reg = <0x62EC0000 0x0>;
		clock-names = "tx_core_clk", "tx_npl_clk";
		clocks = <&clock_audio_tx_1 0>
			 <&clock_audio_tx_2 0>;
		qcom,tx-swr-gpios = <&tx_swr_gpios>;
		qcom,tx-dmic-sample-rate = <4800000>;
		swr_2: tx_swr_master {
			compatible = "qcom,swr-mstr";
			wcd937x_tx_slave: wcd937x-tx-slave {
				compatible = "qcom,wcd937x-slave";
			};
			wcd938x_tx_slave: wcd938x-tx-slave {
				compatible = "qcom,wcd938x-slave";
		};
	};
};

Tanggu Codec

Required properties:
 - compatible: "qcom,wcd937x-codec";
 - qcom,rx_swr_ch_map: mapping of swr rx slave port configuration to port_type and also
		corresponding master port type it need to attach.
		format: <port_id, slave_port_type, ch_mask, ch_rate, master_port_type>
		same port_id configurations have to be grouped, and in ascending order.
 - qcom,tx_swr_ch_map: mapping of swr tx slave port configuration to port_type and also
		corresponding master port type it need to attach.
		format: <port_id,slave_port_type, ch_mask, ch_rate, master_port_type>
		same port_id configurations have to be grouped, and in ascending order.
 - qcom,wcd-rst-gpio-node: Phandle reference to the DT node having codec reset gpio
                        configuration. If this property is not defined, it is
                        expected to atleast define "qcom,cdc-reset-gpio" property.
 - qcom,rx-slave: phandle reference of Soundwire Rx slave device.
 - qcom,tx-slave: phandle reference of Soundwire Tx slave device.

Optional properties:

 - cdc-vdd-ldo-rxtx-supply: phandle of ldo-rxtx supply's regulator device tree node.
 - qcom,cdc-vdd-ldo-rxtx-voltage: ldo-rxtx supply's voltage level min and max in mV.
 - qcom,cdc-vdd-ldo-rxtx-current: ldo-rxtx supply's max current in mA.

 - cdc-vddpx-1-supply: phandle of px-1 supply's regulator device tree node.
 - qcom,cdc-vddpx-1-voltage: px-1 supply's voltage level min and max in mV.
 - qcom,cdc-vddpx-1-current: px-1 supply's max current in mA.

 - cdc-vdd-buck-supply: phandle of buck supply's regulator device tree node.
 - qcom,cdc-vdd-buck-voltage: buck supply's voltage level min and max in mV.
 - qcom,cdc-vdd-buck-current: buck supply's max current in mA.

 - cdc-vdd-mic-bias-supply: phandle of mic bias supply's regulator device tree node.
 - qcom,cdc-vdd-mic-bias-voltage: mic bias supply's voltage level min and max in mV.
 - qcom,cdc-vdd-mic-bias-current: mic bias supply's max current in mA.

 - qcom,cdc-static-supplies: List of supplies to be enabled prior to codec
			     hardware probe.  Supplies in this list will be
			     stay enabled.

 - qcom,cdc-on-demand-supplies: List of supplies which can be enabled
				dynamically.
				Supplies in this list are off by default.

Example:
wcd937x_codec: wcd937x-codec {
	compatible = "qcom,wcd937x-codec";
	qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>,
		<0 HPH_R 0x2 0 HPH_R>, <1 CLSH 0x3 0 CLSH>,
		<2 COMP_L 0x1 0 COMP_L>, <2 COMP_R 0x2 0 COMP_R>,
		<3 LO 0x1 0 LO>, <4 DSD_L 0x1 0 DSD_L>,
		<4 DSD_R 0x2 0 DSD_R>;
	qcom,tx_swr_ch_map = <0 ADC1 0x1 0 ADC1>,
		<1 ADC2 0x1 0 ADC3>, <1 ADC3 0x2 0 ADC4>,
		<2 DMIC0 0x1 0 DMIC0>, <2 DMIC1 0x2 0 DMIC1>,
		<2 MBHC 0x4 0 DMIC2>, <3 DMIC2 0x1 0 DMIC4>,
		<3 DMIC3 0x2 0 DMIC5>, <3 DMIC4 0x4 0 DMIC6>,
		<3 DMIC5 0x8 0 DMIC7>;

	qcom,wcd-rst-gpio-node = <&wcd937x_rst_gpio>;
	qcom,rx-slave = <&wcd937x_rx_slave>;
	qcom,tx-slave = <&wcd937x_tx_slave>;

	cdc-vdd-buck-supply = <&L15A>;
	qcom,cdc-vdd-buck-voltage = <1800000 1800000>;
	qcom,cdc-vdd-buck-current = <650000>;

	cdc-vdd-ldo-rxtx-supply = <&L10A>;
	qcom,cdc-vdd-ldo-rxtx-voltage = <1800000 1800000>;
	qcom,cdc-vdd-ldo-rxtx-current = <25000>;

	cdc-vddpx-1-supply = <&L10A>;
	qcom,cdc-vddpx-1-voltage = <1800000 1800000>;
	qcom,cdc-vddpx-1-current = <10000>;

	cdc-vdd-mic-bias-supply = <&BOB>;
	qcom,cdc-vdd-mic-bias-voltage = <3296000 3296000>;
	qcom,cdc-vdd-mic-bias-current = <25000>;

	qcom,cdc-static-supplies = "cdc-vdd-ldo-rxtx",
				   "cdc-vddpx-1";
	qcom,cdc-on-demand-supplies = "cdc-vdd-buck",
				      "cdc-vdd-mic-bias";
};

Traverso Codec

Required properties:
 - compatible: "qcom,wcd938x-codec";
 - qcom,rx_swr_ch_map: mapping of swr rx slave port configuration to port_type and also
		corresponding master port type it need to attach.
		format: <port_id, slave_port_type, ch_mask, ch_rate, master_port_type>
		same port_id configurations have to be grouped, and in ascending order.
 - qcom,tx_swr_ch_map: mapping of swr tx slave port configuration to port_type and also
		corresponding master port type it need to attach.
		format: <port_id,slave_port_type, ch_mask, ch_rate, master_port_type>
		same port_id configurations have to be grouped, and in ascending order.
 - qcom,wcd-rst-gpio-node: Phandle reference to the DT node having codec reset gpio
                        configuration. If this property is not defined, it is
                        expected to atleast define "qcom,cdc-reset-gpio" property.
 - qcom,rx-slave: phandle reference of Soundwire Rx slave device.
 - qcom,tx-slave: phandle reference of Soundwire Tx slave device.

Optional properties:

 - cdc-vdd-rxtx-supply: phandle of rxtx supply's regulator device tree node.
 - qcom,cdc-vdd-rxtx-voltage: rxtx supply's voltage level min and max in mV.
 - qcom,cdc-vdd-rxtx-current: rxtx supply's max current in mA.

 - cdc-vddio-supply: phandle of io supply's regulator device tree node.
 - qcom,cdc-vddio-voltage: io supply's voltage level min and max in mV.
 - qcom,cdc-vddio-current: io supply's max current in mA.

 - cdc-vdd-buck-supply: phandle of buck supply's regulator device tree node.
 - qcom,cdc-vdd-buck-voltage: buck supply's voltage level min and max in mV.
 - qcom,cdc-vdd-buck-current: buck supply's max current in mA.

 - cdc-vdd-mic-bias-supply: phandle of mic bias supply's regulator device tree node.
 - qcom,cdc-vdd-mic-bias-voltage: mic bias supply's voltage level min and max in mV.
 - qcom,cdc-vdd-mic-bias-current: mic bias supply's max current in mA.

 - qcom,cdc-static-supplies: List of supplies to be enabled prior to codec
			     hardware probe.  Supplies in this list will be
			     stay enabled.

 - qcom,cdc-on-demand-supplies: List of supplies which can be enabled
				dynamically.
				Supplies in this list are off by default.

Example:
wcd938x_codec: wcd938x-codec {
	compatible = "qcom,wcd938x-codec";
	qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>,
		<0 HPH_R 0x2 0 HPH_R>, <1 CLSH 0x3 0 CLSH>,
		<2 COMP_L 0x1 0 COMP_L>, <2 COMP_R 0x2 0 COMP_R>,
		<3 LO 0x1 0 LO>, <4 DSD_L 0x1 0 DSD_L>,
		<4 DSD_R 0x2 0 DSD_R>;
	qcom,tx_swr_ch_map = <0 ADC1 0x1 0 ADC1>,
		<1 ADC2 0x1 0 ADC3>, <1 ADC3 0x2 0 ADC4>,
		<2 DMIC0 0x1 0 DMIC0>, <2 DMIC1 0x2 0 DMIC1>,
		<2 MBHC 0x4 0 DMIC2>, <3 DMIC2 0x1 0 DMIC4>,
		<3 DMIC3 0x2 0 DMIC5>, <3 DMIC4 0x4 0 DMIC6>,
		<3 DMIC5 0x8 0 DMIC7>;

	qcom,wcd-rst-gpio-node = <&wcd938x_rst_gpio>;
	qcom,rx-slave = <&wcd938x_rx_slave>;
	qcom,tx-slave = <&wcd938x_tx_slave>;

	cdc-vdd-buck-supply = <&S4A>;
	qcom,cdc-vdd-buck-voltage = <1800000 1800000>;
	qcom,cdc-vdd-buck-current = <650000>;

	cdc-vdd-rxtx-supply = <&S4A>;
	qcom,cdc-vdd-rxtx-voltage = <1800000 1800000>;
	qcom,cdc-vdd-rxtx-current = <30000>;

	cdc-vddio-supply = <&S4A>;
	qcom,cdc-vddio-voltage = <1800000 1800000>;
	qcom,cdc-vddio-current = <30000>;

	cdc-vdd-mic-bias-supply = <&BOB>;
	qcom,cdc-vdd-mic-bias-voltage = <3296000 3296000>;
	qcom,cdc-vdd-mic-bias-current = <30000>;

	qcom,cdc-static-supplies = "cdc-vdd-rxtx",
				   "cdc-vddio";
	qcom,cdc-on-demand-supplies = "cdc-vdd-buck",
				      "cdc-vdd-mic-bias";
};

Bolero Clock Resource Manager

Required Properties:
 - compatible = "qcom,bolero-clk-rsc-mngr";
 - qcom,fs-gen-sequence: Register sequence for fs clock generation
 - clock-names : clock names defined for WSA macro
 - clocks : clock handles defined for WSA  macro

Optional Properties:
 - qcom,rx_mclk_mode_muxsel: register address for RX macro MCLK mode mux select
 - qcom,wsa_mclk_mode_muxsel: register address for WSA macro MCLK mux select
 - qcom,va_mclk_mode_muxsel: register address for VA macro MCLK mode mux select

Example:
&bolero {
	bolero-clock-rsc-manager {
		compatible = "qcom,bolero-clk-rsc-mngr";
		qcom,fs-gen-sequence = <0x3000 0x1>,
				<0x3004 0x1>, <0x3080 0x2>;
		qcom,rx_mclk_mode_muxsel = <0x033240D8>;
		qcom,wsa_mclk_mode_muxsel = <0x033220D8>;
		qcom,va_mclk_mode_muxsel = <0x033A0000>;
		clock-names = "tx_core_clk", "tx_npl_clk", "rx_core_clk",
			"rx_npl_clk", "wsa_core_clk", "wsa_npl_clk",
			"va_core_clk", "va_npl_clk";
		clocks = <&clock_audio_tx_1 0>, <&clock_audio_tx_2 0>,
			<&clock_audio_rx_1 0>, <&clock_audio_rx_2 0>,
			<&clock_audio_wsa_1 0>, <&clock_audio_wsa_2 0>,
			<&clock_audio_va_1 0>, <&clock_audio_va_2 0>;
	};
};
